The invention relates to a ramp generator with no ramp on/off delay, which is supply voltage and temperature independent and which is controllable by a D.C. voltage.
In the course of providing analog recordings such as, for example, in the professional video recording field, it is necessary to perform editing operations, particularly in the generation of professional video broadcast tapes. The editing process in turn requires the generation of a very precise linear ramp of constant ramp time in order to provide pop-free edits. That is, as commonly known, when a high frequency signal is fed to an inductor such as that of a magnetic record or erase head, it tends to cause an audible and very annoying click or pop which is recorded on tape. Ramping the bias current suppresses the unacceptable pop.
Typical analog recording systems such as those, for example, in a helical video recorder, presently utilize a basic integrator circuit i.e. an operational amplifier, to generate an adequate linear ramp waveform. However, after the integrator circuit has completed the generation of either an increasing or decreasing ramp, the input of the operational amplifier tends to drift towards the full supply voltage fed thereto. Thus when the integrator circuit is turned on again, there is a significant delay while the input to the operational amplifier is charging back to its operating point, before the ramp is actually started. Thus, the start of the ramp is significantly delayed relative to the time that a "go" input signal is applied to the generator. In addition, the ramp time is dependent upon variations in the supply voltage and upon temperature. Such conditions deteriorate the precision of the generated ramp, leading to ramp timing variations and the resulting popping sounds at the edit points.
In a modification to the typical integrator ramp generator of mention above, the delay generated after the application of the "go" signal may be shortened by diode clamping the input to the operational amplifier via back-to-back diodes. However, the shortened delay time still is dependent upon a 0.6 V supply term, wherein V supply is a variable.
The present invention overcomes the shortcomings of the present typical ramp generators mentioned above, by providing a ramp generator with no ramp timing delay, wherein the ramp is a function of an operational amplifier RC term only, and is not dependent upon supply voltage or temperature variations. In addition, the bias level fed to the head is readily controlable via a DC level.
To this end, an integrator for generating the ramp output signal is preceeded by an error amplifier. The latter is supplied with the ramp-on signal and, in turn, supplies an input signal to an integrator. The integrator also is supplied with a reference voltage. The output of the integrator is fed back to the positive input of the error amplifier. The input signal is clamped positively by the reference voltage and negatively by ground. The result is the generation of a ramp with no delay from the time the ramp-on signal is applied, wherein the ramp is a function of the RC term of the integrator only.
Accordingly, it is an object of the invention to provide a precise ramp time with no ramp timing delay when the ramp is turned on or off.
It is another object to provide a ramp which is uneffected by supply voltage and temperature variations.
Another object is to provide a ramp wherein the bias or erase level is readily controlled by a DC voltage level while constant ramp times are maintained for editing.